using same hardware pin for SPI data in/out

[_arhi_]

Going through IDF documentation on SPI-MASTER-DRIVER and datasheet and I'm not finding what I'd like to so last chance is asking here. I would like to use hw spi (0.5-1MHz) with ESP32 but I need to use same pin for MOSI and MISO. When I bitbang the communication it works ok but is slow so I'd like to use HW SPI. I made the single direction (master out slave in) work but the DUT is using only one pin and responds through that pin back.

Is there a way to configure SPI on ESP32 to do half-duplex mode and use same pin for MOSI and MISO ?

I tried

Code: Select all

  spi_bus_config_t spi_bus_config = {
		.mosi_io_num = 23,
		.miso_io_num = -1,
		.sclk_io_num = 18,
		.quadwp_io_num = -1,
		.quadhd_io_num = -1,
		.max_transfer_sz = 0,
		.flags = 0
	};
	spi_bus_initialize( HSPI_HOST, &spi_bus_config, SPI_DMA_CH_AUTO );

  spi_device_interface_config_t devcfg = {
	.clock_speed_hz = 1000000,
	.spics_io_num = -1,
	.queue_size = 1,
	.mode = 3,
	.flags = SPI_DEVICE_BIT_LSBFIRST,
  }
  spi_device_handle_t handle;
  spi_bus_add_device( HSPI_HOST, &devcfg, &handle);
  
  ...
  
  		SPITransaction.length = NumOfBytes * 8;
		SPITransaction.tx_buffer = Data;
		spi_device_transmit( Handler->SPIHandle, &SPITransaction );
		
  ...
      spi_transaction_t SPITransaction = {
        .cmd = 0x00,
        .rxlength = 8 * NumOfBytes,
        .flags = 0,
        .tx_buffer = NULL,
        .rx_buffer = Data,
    };
		spi_device_transmit( Handler->SPIHandle, &SPITransaction );		

hoping that miso_io_num = -1 and .tx_buffer = NULL will maybe help here but unfortunately ...

Anyone have a clue if this is possible?

I was thinking of maybe using 2 pins and linking them to the same DUT pin, but the problem is that MOSI drives the output too so it will "fight" with output of the DUT. Dunno if ESP32 support those "week output" like some nordic ble devices so that DUT can easily drive the signal without MOSI interfering?

[ESP_Sprite]

Yes.

[_arhi_]

Thanks! I went through that page so many times and I didn't see that .. Thanks!