ESP32 Forum

The TRM states, "The controller supports two peripherals which cannot be functional at the same time". Since the peripheral can be reconfigured with a different slot configuration (sdmmc_slot_config), what is the purpose of the second slot?

This question is limited to the esp32s3 SoC.

Presumably you could configure two slots and use both of them, although as the TRM mentions, the transfers would not happen concurrently. This would still be a lot faster than reconfiguring the pins in the driver each time a command is issued.

I'm terms of silicon area, the cost of the 2nd slot isn't very significant, so another part of the answer is that it likely wasn't a big issue to keep the 2nd slot to keep things similar to the esp32.

My experience with SoCs based around a form of applications processor is that they have multiple multiple hosts, so looking at the ESP32S3 from this perspective it was unclear to me at first what the purpose of the second slot was.

What you're saying makes sense but I didn't test the time difference between switching a slot and reconfiguring IO. As I won't be accessing both slots in an interleaved fashion, this will not be an issue for me. At this time I am more concerned with the low read and write speeds to a FATFS partition!

Thanks for your reply!