Mapping external SRAM to instruction space on the ESP32?
Posted: Sat Oct 30, 2021 6:36 pm
I've been looking at doing a Fuzix port (a very small, light-weight Unix clone) for the ESP32. I've got a ESP32-WROVER device, which means it's got 8MB of external QSPI SRAM.
What I'd really like to do is to split this into 4MB for process data and 4MB for process code; the programs would actually be stored on external flash, and copied to this space as they're loaded. I can then subdivide them per process using the Cache MMU so that each process sees its code and data at the same address.
However, the Technical Reference appears to say that external SRAM can only be mapped to data space. Is this correct, or is it a documentation error? If it is correct, is there any other way to store code in external SRAM?
(My backup plan is to use SRAM 0 and 1 for program storage, but SRAM1 doesn't have an MMU. I could just use SRAM 0 and swap process code in and out of external SRAM as needed but that's terrible, and I'm hoping to avoid it.)
What I'd really like to do is to split this into 4MB for process data and 4MB for process code; the programs would actually be stored on external flash, and copied to this space as they're loaded. I can then subdivide them per process using the Cache MMU so that each process sees its code and data at the same address.
However, the Technical Reference appears to say that external SRAM can only be mapped to data space. Is this correct, or is it a documentation error? If it is correct, is there any other way to store code in external SRAM?
(My backup plan is to use SRAM 0 and 1 for program storage, but SRAM1 doesn't have an MMU. I could just use SRAM 0 and swap process code in and out of external SRAM as needed but that's terrible, and I'm hoping to avoid it.)