ESP32 Forum

Hello,

The ESP32 Hardware Design Guidelines which can be found on the Documents page, in section 2.5 say

The output impedance of the RF pins of ESP32 (QFN 6*6) and ESP32 (QFN 5*5) are (30+j10) Ω and (35+j10) Ω, respectively. A π-type matching network is essential for antenna matching in the circuit design. CLC structure is recommended for the matching network.

but that document is referring to the ESP32 series of chips

The ESP32 series of chips includes ESP32-D0WD-V3, ESP32-D0WDQ6-V3, ESP32-D0WD, ESP32-D0WDQ6, ESP32-D2WD, ESP32-S0WD, and ESP32-U4WDH, among which, ESP32-D0WD-V3, ESP32-D0WDQ6-V3, and ESP32-U4WDH are based on ECO V3 wafer.

which does not include the ESP32-C3.

As I understand, that value is needed for designing a matching network.

In the ESP32-C3 Hardware Design Guidelines, there is no output impedance of the RF pins mentioned.
The ESP32-C3 family of chips consists only of QFN 5*5 packages at the moment and my question is, are the values mentioned in the ESP32 Guidelines accurate for the ESP32-C3 (35+j10 Ω)?

ESP32 Hardware Design Guidelines: https://www.espressif.com/sites/default ... nes_en.pdf
ESP32-C3 Hardware Design Guidelines: https://www.espressif.com/sites/default ... nes_en.pdf

Any help is appreciated!

Hello, output impedance is 35 ohms.

Hello. Is the impedance only 35 ohms or 35+j10 ohms?

Are there any official resources that I can check this out? Hardware Design Guidelines still mentions nothing about the output impedance.

Matching point is (30 ~ 40) ±10 j ohms, we will update this information on hardware design guidelines later.