In the schematic for ESP32-D0WD and ESP32-D0WDQ6, there are capacitors on pins 43 and 46 and both are connected to 3.3V power rail. Cap C20 value is 1uF and C3 is 100pF, but it doesn't specify which capacitance value should be at which pin. Is there any advantage to having either value on a specific pin, or does it not matter at all?
Of course they are both connected through vias to the 3.3V trace which is on the bottom layer, but it is a much longer path to the other pin through this trace. I am just wondering if, due to the design of the IC, one of the pins could use more bulk capacitance with the 1uF cap, while the other would benefit more from the high-frequency decoupling with the 100pF.
From datasheet page 7: https://www.espressif.com/sites/default ... nes_en.pdf
Specific pin assignment for capacitors C20 and C3 for ESP32-D0WD and ESP32-D0WDQ6
Who is online
Users browsing this forum: No registered users and 119 guests