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Esp32-s3 i2s with dma transfer size
Posted: Tue Jan 26, 2021 11:11 pm
by Baldhead
Hi,
Someone from espressif team could tell me if the i2s dma hardware problem of esp32 was solved on esp32-s3 ?
The i2s dma transfer are only 32 bits yet on esp32-s3 ?
I would like to have a 16bit pixel buffer and 8 bit i/o transfer.
I think that in my case, i2s dma transfer size are 16bit and i2s memory fifo are 8bit.
What are the max clock transfer on i2s dma with 8 bit i/o transfer on esp32-s3 ?
Thank's for the help.
Re: Esp32-s3 i2s with dma transfer size
Posted: Thu Jan 28, 2021 3:47 am
by Baldhead
????
Re: Esp32-s3 i2s with dma transfer size
Posted: Mon Feb 01, 2021 7:15 am
by Baldhead
Hi @espressifTeam,
No answer yet.
Thank's.
Re: Esp32-s3 i2s with dma transfer size
Posted: Mon Feb 01, 2021 8:13 am
by ESP_Sprite
No answer as that information is not public yet, sorry.
Re: Esp32-s3 i2s with dma transfer size
Posted: Fri Mar 19, 2021 5:40 pm
by Baldhead
Why is it taking too long to publicly release that chip?
Are espressif solving bugs on the silicon chip yet ?
What is the forecast for public launch of this chip and modules ?
Re: Esp32-s3 i2s with dma transfer size
Posted: Mon Mar 22, 2021 2:47 am
by ESP_Sprite
Because all we have publicly at this point is beta silicon. There can be some substantial differences between mass manufactured chips and their beta variant, as beta versions are mostly made to test the analog stuff on the die rather than the digital things, and as such we take the opportunity to push a fair few extra features and tweaks in the digital domain into the chip before we tape out the mass produced version. This also means we can only release detailed specs and documents until we have fully taped out, gotten back and verified these features, however.
I can't tell you an exact schedule, but just spitballing, I wouldn't expect final S3 chips to reach the market before July.