ESP32 Forum

RTCs I have used in the past usually had a cap and a diode to keep them powered for a while. But the memory in them was persistent so even a long power outage would result in a system time that is later than the last reported event, even if not completely accurate.
What I am seeing at this time is that if I write to the RTC, I get time set and it updates but a chip reset sends time back to the epoch.
Is there a mechanism to hold time in the chip past a power cycle? I do not have a supercap to hold the chip up long enough to go to sleep/hibernate yet. but if there is no mechanism to maintain time, there is no value in the board change. It looks like I can authorize the ULP to keep the clock counting while in a low power state. Figure 160: ESP32 Power Control however, indicates that a number of other features are alo powered from the VDD_RTC and the way to shut them down is not obvious at this time.

Suggestions or a pointer to a working project would be appreciated.

Sorry, there is no way for the RTC circuit in the ESP32 to keep its time while main power is off; powering VDD_RTC separately will have no effect.

Sounds like a perfect example of a future improvement. Having something close to correct time when coming up can be very useful. It will not be good enough to reuse a timeslot in a 5G network, but it does help in MeanTimetoFirstFix for a GPS type system if it has some idea of which satellites are receivable as long as it has not moved too far from its last position.

I agree, and we have that feature on the roadmap internally. Seems it's not trivial to implement, however, so I don't know when it will show up in silicon.