Large time gaps between I2C packets
Posted: Wed May 13, 2020 5:12 pm
I'm tryig to send I2C read and write commands in rapid sequence as fast as it possible to a slave device. I2C clock speed is 400KHz. The picture below shows the I2C clock and data lines. As you can see, there are ~100uS gaps between write and read messages. That gap size is ~26,000 CPU clocks. It's hard to believe that the I2C interrupt routine requires this time.
Below is the source code of the function used for transfer the two messages in the oscilloscope trace.
Has anyone else seen this kind of delay in I2C communication? Is there a remedy or workaround?
Below is the source code of the function used for transfer the two messages in the oscilloscope trace.
Has anyone else seen this kind of delay in I2C communication? Is there a remedy or workaround?
Code: Select all
MCU: ESP32D0WDQ6
TOOLS: ESP-IDF v4.2-dev-1320-g1aebfdf6a-dirty
- Gaps between I2C packets
- NewFile1.png (56.11 KiB) Viewed 3075 times
Code: Select all
esp_err_t bmxi2c_read(i2c_port_t i2c_num, uint8_t slave_addr, uint8_t reg_addr, uint8_t* data, uint8_t s\
ize)
{
int ret = ESP_OK;
if (size == 0)
return ret;
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
i2c_master_start(cmd);
i2c_master_write_byte(cmd, slave_addr << 1 | WRITE_BIT, ACK_CHECK_EN);
i2c_master_write_byte(cmd, reg_addr, ACK_CHECK_EN);
i2c_master_stop(cmd);
ret = i2c_master_cmd_begin(i2c_num, cmd, 1000 / portTICK_RATE_MS);
i2c_cmd_link_delete(cmd);
if (ret != ESP_OK) {
return ret;
}
/// vTaskDelay(1 / portTICK_RATE_MS);
cmd = i2c_cmd_link_create();
i2c_master_start(cmd);
i2c_master_write_byte(cmd, slave_addr << 1 | READ_BIT, ACK_CHECK_EN);
i2c_master_read(cmd, data, size, I2C_MASTER_LAST_NACK);
i2c_master_stop(cmd);
ret = i2c_master_cmd_begin(i2c_num, cmd, 1000 / portTICK_RATE_MS);
i2c_cmd_link_delete(cmd);
return ret;
}