Specification of ESP32 NIC

[ille111]

Hi everyone,

I am currently looking into NIC-generated interrupts at the ESP32. Unfortunately, I can't find any specific information about the wifi chip or its firmware. I am interested in information about the throwing of interrupts when packages arrive at the NIC.
Are there interrupt moderation techniques applied? How much memory does the chip have itself for ring buffers?
The TRM doesn't really cover the wifi chip at all... Does anyone know of a document I oversaw or knows who I could contact?

[ESP_Sprite]

No, sorry, the WiFi NIC itself is more-or-less a black box... Can you tell me why you are trying to get this info? Are you trying to solve a specific problem?

[WiFive]

I think he wants to know how the wifi hardware and driver utilize cpu interrupts. Seems like a fair question because it is a shared cpu.

[ille111]

Hi,

thanks for the responses so far. Yes, it has to do with interrupts that are generated by the NIC. I want to estimate the maximum "load" of interrupts the NIC produces under a very large number of incoming packets per second. It would be interesting to know if in fact a ring buffer is used and how the NIC reacts if it is full (i.e. if incoming packets still lead to an interrupt).
This is interesting to me because of the introduced jitter to real-time applications with high criticality.

Best!