SPI Chip Select Fine Control
Posted: Thu Sep 12, 2019 4:29 pm
Hi,
I am trying to interface the ESP32 with the TLC5958 (http://www.ti.com/product/TLC5958). The MOSI and SCK pins are standard, however, the CS pin is not and needs to be held high for ONLY some number of SPI clock cycles. I have attached the timing diagram below.
The SPI_CS_HOLD_DELAY, SPI_CS_DELAY_NUM, and SPI_CS_DELAY_MODE registers look promising, however they are not exposed to the user in the latest ESP32 Tech Reference.
Is there a way to configure the SPI driver to do this? If not, what is the best way to bit-bang this so that the SPI bus can still run at 20Mhz?
Thank you for your help.
I am trying to interface the ESP32 with the TLC5958 (http://www.ti.com/product/TLC5958). The MOSI and SCK pins are standard, however, the CS pin is not and needs to be held high for ONLY some number of SPI clock cycles. I have attached the timing diagram below.
The SPI_CS_HOLD_DELAY, SPI_CS_DELAY_NUM, and SPI_CS_DELAY_MODE registers look promising, however they are not exposed to the user in the latest ESP32 Tech Reference.
Is there a way to configure the SPI driver to do this? If not, what is the best way to bit-bang this so that the SPI bus can still run at 20Mhz?
Thank you for your help.