CS control in SPI
Posted: Mon Jun 24, 2019 5:38 am
For the SPI bus in pico, it usually takes long time in CS high between commands.
Even in high clock, the CS high still dominate lots of time against CS low.
Is it possible to adjust the time for keeping CS high less than 1 us between commands?
Even in high clock, the CS high still dominate lots of time against CS low.
Is it possible to adjust the time for keeping CS high less than 1 us between commands?