In my design, I have a chip that I need to hold into reset state (active low) during power up. From what I can see on the scope, most (if not all) of the IO lines go high (or slew high) during boot until such time as the user's code can take control. While it's not a lot of time, it does accumulate in terms of power consumption over lots of power cycles. I'd like to take advantage of the weak pull down on GPIO2 and use that as the reset line. This chip's reset line is input only so there's no chance of asserting GPIO2 during start up.
Any issues I need to be aware of?
Thanks