Which xtensa options are present in esp32

[torokg]

Hi,

We are currently working on a custom operating system which we wish to run over ESP32. In order to proceed, we need to know which Xtensa CPU options are incorporated to ESP32. We use the document linked below to learn about the architecture and implement metal-specific stuff, but as it is a general Xtensa description, we cannot continue until we don't know how ESP32 is specialised.

Any kind of clue is appreciated

https://0x04.net/~mwk/doc/xtensa.pdf

[ESP_igrr]

You can find the options in this header file: https://github.com/espressif/esp-idf/bl ... core-isa.h