register configuration for ADC-1

[dimitri]

Hi

Currently I'm trying to configure the ADC1 peripheral of the esp32. I notice that the most recent reference manual is not very consistent regarding ADC.
According to the documentation, I think I have set the registers correctly, but I get strange results.
For the configuration I also looked at the ESP-IDF framework, but there, some registers are configured which are not described in the reference manual at all (such as

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SENS.sar_slave_addr1.meas_status

for example)

Maybe someone could verify my configuration ?
This is what I have so far:

set bit_width:

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SENS_SAR_START_FORCE_REG &= ~(SENS_SAR1_BIT_WIDTH_MASK);
SENS_SAR_START_FORCE_REG |= (bit_width << SENS_SAR1_BIT_WIDTH);
SENS_SAR_READ_CTRL_REG &= ~(SENS_SAR1_SAMPLE_BIT_MASK);
SENS_SAR_READ_CTRL_REG |= (bit_width << SENS_SAR1_SAMPLE_BIT);

set attenuation

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SENS_SAR_ATTEN1_REG &= ~(SENS_SAR_ATTEN1_MASK(channel*2));
SENS_SAR_ATTEN1_REG |= (attenuation << (channel*2));

setup gpio / RTC-IO MUX - for channel 0 (gpio 36)

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uint32_t rtc_gpio_num = 0;

// rtc_gpio_init (gpio 36)
RTCIO_SENSOR_PADS_REG |= (uint32_t)(1<<RTCIO_SENSOR_SENSE1_MUX_SEL); // gpio connected to analog RTC
RTCIO_SENSOR_PADS_REG &= ~(uint32_t)RTCIO_SENSOR_SENSE1_FUN_SEL_MASK;// always function 0
	
// rtc_gpio_output_disable
RTCIO_RTC_GPIO_ENABLE_W1TS_REG &= ~((uint32_t)(1 << (rtc_gpio_num + RTCIO_RTC_GPIO_ENABLE_W1TS)));
RTCIO_RTC_GPIO_ENABLE_W1TC_REG |= (uint32_t)(1 << (rtc_gpio_num + RTCIO_RTC_GPIO_ENABLE_W1TC));

// rtc_gpio_input_disable
RTCIO_SENSOR_PADS_REG &= ~(uint32_t)(1 << RTCIO_SENSOR_SENSE1_FUN_IE);

read ADC value

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uint16_t adc1_read_raw(adc1_channel_t channel)
{
	// disable HALL sensor
	RTCIO_HALL_SENS_REG &= ~((uint32_t)(1<<RTCIO_HALL_XPD_HALL));

	// set ADC-CTRL-RTC controller
	SENS_SAR_MEAS_START1_REG |= (uint32_t)(1<<SENS_MEAS1_START_FORCE);
	SENS_SAR_MEAS_START1_REG |= (uint32_t)(1<<SENS_SAR1_EN_PAD_FORCE);
	SENS_SAR_READ_CTRL_REG   &= ~((uint32_t)(1<<SENS_SAR1_DIG_FORCE));
	SENS_SAR_TOUCH_CTRL1_REG |= (uint32_t)(1<<SENS_XPD_HALL_FORCE);
	SENS_SAR_TOUCH_CTRL1_REG |= (uint32_t)(1<<SENS_HALL_PHASE_FORCE);


	// set channel in SAR_MEAS_START1
	SENS_SAR_MEAS_START1_REG &= ~(SENS_SAR1_EN_PAD_MASK);
	SENS_SAR_MEAS_START1_REG |= (uint32_t)(1<<(SENS_SAR1_EN_PAD + channel));

	// start
	SENS_SAR_MEAS_START1_REG &= ~(uint32_t)(1<<SENS_MEAS1_START_SAR);
	SENS_SAR_MEAS_START1_REG |= (uint32_t)(1<<SENS_MEAS1_START_SAR);

	// wait until done
	while ( (SENS_SAR_MEAS_START1_REG & (uint32_t)(1 << SENS_MEAS1_DONE_SAR)) == 0);

	// return value
	return SENS_SAR_MEAS_START1_REG & SENS_MEAS1_DATA_SAR_MASK;
}

[dimitri]

In the meantime, I succeeded to get most of my ADC channels working by looking into the ESP-IDF framework. I saw that the FSM must be disabled too (not documented at all)
However, channel 4 and channel 5 (XTAL32 pads) don't work yet.

Channel 4 always returns 1024 (10 bit)
Channel 5 always returns 0

This is my configuration for channel 4 - I can't see anything different from the ESP-IDF framework at the moment:

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uint32_t rtc_gpio_num = 9;

//GPIO32
RTCIO_XTAL_32K_PAD_REG |= (uint32_t)(1<<RTCIO_XTAL_X32P_MUX_SEL); // gpio connected to analog RTC
RTCIO_XTAL_32K_PAD_REG &= ~(RTCIO_XTAL_X32P_FUN_SEL_MASK);// always function 0

RTCIO_RTC_GPIO_ENABLE_W1TS_REG &= ~((uint32_t)(1 << (rtc_gpio_num + RTCIO_RTC_GPIO_ENABLE_W1TS)));
RTCIO_RTC_GPIO_ENABLE_W1TC_REG |= (uint32_t)(1 << (rtc_gpio_num + RTCIO_RTC_GPIO_ENABLE_W1TC));

RTCIO_XTAL_32K_PAD_REG &= ~((uint32_t)(1 << RTCIO_XTAL_X32P_FUN_IE));	

// pull-mode is FLOATING
RTCIO_XTAL_32K_PAD_REG &= ~((uint32_t)(1 << RTCIO_XTAL_X32P_RUE));
RTCIO_XTAL_32K_PAD_REG &= ~((uint32_t)(1 << RTCIO_XTAL_X32P_RDE));

[dimitri]

Is there no one who can help me or give me some good documentation about how to setup the ADC for esp32 (without using the esp-idf framework).
The latest version of the technical reference is not complete at all about this.