Search found 3 matches
- Mon Mar 25, 2019 6:34 pm
- Forum: Hardware
- Topic: GPIO12(boot) bootstrap Tsetup and Thold timings
- Replies: 7
- Views: 9208
Re: GPIO12(boot) bootstrap Tsetup and Thold timings
Thank you for checking. Is this documented in a spec somewhere? Is tHold really one(1) millisecond(1)???. Typically thold has been a few nanoseconds since the ttl 7400 series. 1ms seems excessively long to have to hold the bootstrap data after the positive edgc of EN (nreset). It is common to tri-st...
- Wed Feb 27, 2019 8:29 pm
- Forum: Hardware
- Topic: GPIO12(boot) bootstrap Tsetup and Thold timings
- Replies: 7
- Views: 9208
Re: GPIO12(boot) bootstrap Tsetup and Thold timings
Thanks. I did look "everywhere" for it, My post mentioned GPIO12 and Boot in the same breath. I realize that they are different bootstrapping pins. Just were thinking about them both. The GPIO12 and its conflict with the 4-bit SDCARD DATA2 almost bit me. im going to gate a bootsrap-time pullup/pulld...
- Tue Feb 26, 2019 9:41 pm
- Forum: Hardware
- Topic: GPIO12(boot) bootstrap Tsetup and Thold timings
- Replies: 7
- Views: 9208
GPIO12(boot) bootstrap Tsetup and Thold timings
I understand that several pins are sampled upon EN (ie Resetn) going high on powerup. I see several discussion threads about BOOT(GPIO12) and the fact that it has to be pulled high for some modules and low for other variants. Got it. One method used frequently in situations like this is to degate th...