Thank you! Solved this problem for me.

Hi, guys. Following up on: What is the state of a digital IO in deep sleep. E.g. GPIO17 My question I have pins on my ESP32-WROOM-32 that are connected to external signals (IO16, IO17) and do not have RTC capability. The signals on those pins are stable (i.e. have definite logic levels) from externa...

Hi, It is a bit noisy with small ripples on 3.3V while transmitting. Why is the 10mOhm resistor needed? The goal was to pinpoint the source of the noise. Whether it's a noisy power supply or the drops are simply because of [acceptable] lack of regulation. I was looking for something dramatic that m...

Regarding the third option, you could have a dedicated web server with https that takes a one time device request for signature of its own certificate; you could validate the server's certificate easily from the device side, while providing some fixed setup-use-only client-certificate to the server ...

Have you tried using a separate FreeRTOS task for the request? Check the xTaskCreate() function, and use semaphores to coordinate the tasks. YouTube is your friend!

I'd like to have support for UART in light-sleep mode, meaning: a not-so-small receive buffer (e.g. 64 bytes?) and the ability of waking up the cores after receiving some "complete" packet (either by size, character match, character timeout, etc.). A decent send buffer that works in light-sleep woul...

I would like to add that it happened in a few other EV boards. And the current usually drops to around 100-150mA. In one of them manual reset helped. Hi, what about your power supply? Does it look stable? Can you look at it with an Oscilloscope? (With a 10 mohm series resistor between your power so...

Thank you. Does it make any difference if the lines are contiguous? I mean, if I access 2KB of contiguous memory vs. 2KB comprised of randomly located 32 byte chunks (as long as the chunks are properly aligned, of course)?

Hi. I've looked around a bit but I couldn't find an indication of how much actual RAM/Flash does 32K represent in the cache. I assume that the cache needs to reserve space for metadata information, like page source address, some kind of access tree, so I'd like to have a better idea about how many r...

Thank you for your answer. CPUs will enter "wait for interrupt" idle state from the Idle task (i.e. when there are no other tasks to run). This saves a few mA (when CPU frequency is 240MHz). Does this mean that if I lower the CPU frequency for normal operation (e.g. 80, 40, 20 MHz) the "wait for int...