To followup on the topic: we ended up rolling our own very lean UART driver. The FIFO status is tracked by a dedicated ISR routine, and interrupt register status is managed with uart_enable_intr_mask(), uart_disable_intr_mask() and uart_clear_intr_status(). Which is a shame because we can't rely on ...

Hi. I need to send and receive data from UART asynchronously. In order make non-blocking uart_write_bytes() calls, I need to extract an event signaling the starvation of the TX ring buffer (or the TX fifo if 'tx_buffer_size' == 0), and pass it upstream, so that more data can be queued. Among the eve...