This issue got solved. I was missing one subfolder under BF(Config) in Makefile. But it is strange that was including automatically with V3.2 without this inclusion!.
EXTRA_COMPONENT_DIRS += $(PROJECT_PATH)/project/Code/BF
EXTRA_COMPONENT_DIRS += $(PROJECT_PATH)/project/Code/BF/config
Search found 17 matches
- Wed Sep 25, 2019 6:45 am
- Forum: General Discussion
- Topic: Path issue while upgrading to ESp32 V3.3 version
- Replies: 1
- Views: 2486
- Wed Sep 25, 2019 5:43 am
- Forum: General Discussion
- Topic: Path issue while upgrading to ESp32 V3.3 version
- Replies: 1
- Views: 2486
Path issue while upgrading to ESp32 V3.3 version
I had been using ESP IDF 3.2 version for my project I was using EXTRA_COMPONENT_DIRS variable for adding my project related paths like below in Main Makefile & using component files in each folder for getting it compiled. EXTRA_COMPONENT_DIRS += $(PROJECT_PATH)/project/Code/BF EXTRA_COMPONENT_DIRS +...
Re: Reset
Yes Rithesh you are correct.
Can i get some sample code to configure Burnout reset and test the same.
Thanks for the reply.
Can i get some sample code to configure Burnout reset and test the same.
Thanks for the reply.
Re: Reset
Thanks for your reply.
Can i get some information about the testing of Brownout reset type.
Can i get some information about the testing of Brownout reset type.
- Wed Apr 10, 2019 12:49 pm
- Forum: ESP-IDF
- Topic: CAN testing issue
- Replies: 0
- Views: 2176
CAN testing issue
Hi, I'm using CAN implementation of ESP32. Once i'll start the application program is getting stuck in with "I (285) cpu_start: Pro cpu start user code". But in CAN analyzer i'm able to see the data which application is sending. This problem i'm facing from 8th March 2019. Previously i was able to s...
Reset
Hi,
Please share the example codes of all type of resets,
1. Watch dog timer reset.
2. Poweron Reset.
3. Software reset.
Please share the example codes of all type of resets,
1. Watch dog timer reset.
2. Poweron Reset.
3. Software reset.
- Mon Mar 11, 2019 4:13 am
- Forum: General Discussion
- Topic: FRC timer
- Replies: 3
- Views: 5049
Re: FRC timer
Thanks for the reply. I had a look at TG group timers. But there is no sample code for multiple timer(soft timers) option using TG timer group as like in esp_timer. for example I would like to use TG timer 1 as base for multiple timer like in esp_timer (FRC2 as base). Is there any sample code availa...
- Sat Mar 09, 2019 9:48 am
- Forum: General Discussion
- Topic: FRC timer
- Replies: 3
- Views: 5049
FRC timer
As in esp_timer_esp32.c file ,esp_timer using uses FRC2 (legacy) timer of the ESP32 . and we can see those are hard coded to REG1(1) there as well.Is there more FRC timers which can be used for making multiple soft timers if we change accordingly ?. For example In frc-timer_reg.h , #define FRC_TIMER...
- Mon Feb 25, 2019 8:26 am
- Forum: ESP-IDF
- Topic: Multiple timers using single hardware timer
- Replies: 5
- Views: 8553
Re: Multiple timers using single hardware timer
Hi ESP_Angus
Any sample code available to create multiple timers from 64 bit timers. ?
Any sample code available to create multiple timers from 64 bit timers. ?
- Thu Feb 21, 2019 6:18 am
- Forum: ESP-IDF
- Topic: Multiple timers using single hardware timer
- Replies: 5
- Views: 8553
Re: Multiple timers using single hardware timer
esp_ timer (example/system/esp_timer) is entirely different compared to 64 bit timer group (2 groups with 4 timers) . Is there any sample code available to create multiple timers from any of these 64 bit timers as base ?. If we are looking on STM32 based chips there are capture/compare registers wit...