What are the state of ESP32 GPIO in RESET?
Is it allowed to apply VDD voltage level on GPIOs on a VDD powered ESP32 chip when enable/reset pin
is low (Reset / disable state)?

Thanks for help

Hello, I was unable to find in the ESP32 various documentations what is the ESP32 GPIO behaviour when all VDD pins are powered but CHIP_PU (Enable/Reset) is held low. In our future product the ESP32 will be connected to an STM32F7 microcontroller, both on UART and SDIO interfaces. When the STM32 is ...