Search found 6 matches
- Thu Aug 29, 2024 10:12 pm
- Forum: ESP-IDF
- Topic: esp_now_set_peer_rate_config migration
- Replies: 0
- Views: 895
esp_now_set_peer_rate_config migration
Hi! I'm working to migrate our ESPNow API from esp_wifi_config_espnow_rate to esp_now_set_peer_rate_config. esp_now_set_peer_rate_config has three extra arguments, phymode, ersu and dcm. I'd like to know what these values default to so that I can be backwards compatible. My goal is for C6 ESPNow to ...
- Tue Mar 05, 2024 8:17 pm
- Forum: ESP-IDF
- Topic: Function to check if cache is active?
- Replies: 4
- Views: 1573
Re: Function to check if cache is active?
I take it back. `spi_flash_cache_enabled()` has a race condition. It needs to be false before the disable process begins. Otherwise code can check, continue executing and then lose access. See this backtrace where an isr is interrupting the disable process and calling a function that is in flash. 0x...
- Tue Feb 13, 2024 5:31 pm
- Forum: ESP-IDF
- Topic: Function to check if cache is active?
- Replies: 4
- Views: 1573
Re: Function to check if cache is active?
Thanks! That's the lead I needed. I think you meant `spi_flash_cache_enabled()` as the first function. It is working well.
- Mon Feb 05, 2024 11:38 pm
- Forum: ESP-IDF
- Topic: Function to check if cache is active?
- Replies: 4
- Views: 1573
Function to check if cache is active?
Hi, Overall our transition of CircuitPython to IDF 5.1 has been great. One weird thing I'm hitting is the global kconfig setting that dictates whether an ISR is in IRAM. We have multiple ways we use gptimer but we only want it in IRAM "mode" some of the time. Is there a function we can call to detec...
- Tue Sep 12, 2023 10:42 pm
- Forum: ESP-IDF
- Topic: PSRAM address with SPIRAM_USE_MEMMAP
- Replies: 0
- Views: 649
PSRAM address with SPIRAM_USE_MEMMAP
In IDF 5.0 how do I determine the address of psram when SPIRAM_USE_MEMMAP is set? In 4.x it is at a fixed location.
Thanks!
~Scott
Thanks!
~Scott
- Tue Jun 23, 2020 11:02 pm
- Forum: General Discussion
- Topic: What defines SPI Flash/RAM pins?
- Replies: 2
- Views: 2971
What defines SPI Flash/RAM pins?
What defines the pins that are used for SPI Flash and RAM? I was looking at the WROOM and WROVER ESP32-S2 modules and was surprised to find the flash on IO35-37. The S2 data sheet suggests (section 2.4.2) that pins < IO7 are more commonly used. I ask because I designed a breakout assuming IO35-37 wo...