Unfortunately, holding the ESP32 in reset does not allow access to the flash memory from a second processor.

It looks like we will have to add a second flash memory part on one of the application SPI controller. Not a big deal except for the time and expense of turning the board.

Except once all the interrupts and caching has been disabled, it is not possible to display debugging output.

At this point we are looking at simply having the second processor directly hold the ESP32 in reset while it is reading the flash.

Note that first we call disable_interrupts_caches_and_other_cpu().

At the end we // loop here waiting for a specific gpio pin to change state, then reboot.

These two things work fine, it is just that the SPI bus is still driven.

Hi, We have a board were we need to force the ESP32 to float it's SPI pins to the flash memory to allow a second processor to read. Once it has been read the ESP32 reboots. It seems simple enough, but have so far been unsuccessful. It appears the ESP32 is still driving the SPI output pins. The secon...