Search found 6 matches
- Mon Oct 02, 2017 10:50 am
- Forum: ESP-IDF
- Topic: Debugging a signle register with JTAG
- Replies: 5
- Views: 8071
Re: Debugging a signle register with JTAG
Which buses are involved here? How is the WDEV_RND_REG linked to the address given in the TRM (0x3ff75144)?
- Sun Oct 01, 2017 12:55 pm
- Forum: ESP-IDF
- Topic: Debugging a signle register with JTAG
- Replies: 5
- Views: 8071
Re: Debugging a signle register with JTAG
Thanks ESP_igrr
Why is the SDK always using WDEV_RND_REG, which is pointing to 0x60035144, instead of 0x3ff75144 as mentioned in the technical reference manual?
Why is the SDK always using WDEV_RND_REG, which is pointing to 0x60035144, instead of 0x3ff75144 as mentioned in the technical reference manual?
- Tue Aug 01, 2017 9:04 am
- Forum: ESP-IDF
- Topic: TUMPA and JTAG
- Replies: 2
- Views: 6747
Re: TUMPA and JTAG
Hi,
have you double checked the JTAG PIN connection? Attached you will find my cabling (esp32 DEV C).
I am not using this entry in the config:
HTH
br
Patrick
have you double checked the JTAG PIN connection? Attached you will find my cabling (esp32 DEV C).
I am not using this entry in the config:
Code: Select all
esp32 flashbootstrap 1.8
br
Patrick
- Tue Aug 01, 2017 8:56 am
- Forum: ESP-IDF
- Topic: Reading register twice (in the next clock cycle)
- Replies: 1
- Views: 3685
Reading register twice (in the next clock cycle)
Hi, I have the following code and I would like to read the register twice without spending a single clock for flushing buffers etc. If I use the REG_READ define, it results into 5 opcodes but I would like to know the register content within the next clock cycle. Is there any chance to do so? 50 vola...
- Sat Jul 29, 2017 12:31 pm
- Forum: ESP-IDF
- Topic: Disable optimization (optimize for JTAG debugging)
- Replies: 5
- Views: 8872
Disable optimization (optimize for JTAG debugging)
Hi all, I would like to disable any optimization of the C code. I am using the Eclipse IDE, having the CFLAGS env variable set to optimize for gdb. It this the right approach? When debugging via JTAG, I still can see cases when I hover over a varaiable, it says "Optimized Out". Thanks and best regar...
- Sun Jul 23, 2017 8:54 am
- Forum: ESP-IDF
- Topic: Debugging a signle register with JTAG
- Replies: 5
- Views: 8071
Debugging a signle register with JTAG
Hi all, I have the TUMPA JTAG v2 board, connected to the ESP32 DevKitC board. The connection works fine and OpenOCD and gdb is properly setup. In my main.c, I am using the following function: #define RAND_REGCOUNT 32 // * 4 bytes = 1kByte uint32_t IRAM_ATTR esp_random_custom(void) { uint32_t retval;...