Uuuupps, too much copy-and-paste here, thank you!
Well, no change: the NAU88C22 does still not react to my probing...
Regards, Klaus
Search found 5 matches
- Sun Aug 25, 2024 9:57 am
- Forum: ESP-IDF
- Topic: IDF5.3 ESP32s3, NAU88C22, delay between SDA and SCL
- Replies: 10
- Views: 2772
- Fri Aug 23, 2024 9:44 am
- Forum: ESP-IDF
- Topic: IDF5.3 ESP32s3, NAU88C22, delay between SDA and SCL
- Replies: 10
- Views: 2772
Re: IDF5.3 ESP32s3, NAU88C22, delay between SDA and SCL
One thought I had is that maybe the chip needs MCLK to function, but I don't think that's the case: the datasheet doesn't mention it and my own code for the NAU88C10 initializes I2C before it initializes I2S and that works well. Well, in my tests with the STM32, the ESP32 is executing a _NOP-Waitin...
- Thu Aug 22, 2024 6:54 am
- Forum: ESP-IDF
- Topic: IDF5.3 ESP32s3, NAU88C22, delay between SDA and SCL
- Replies: 10
- Views: 2772
Re: IDF5.3 ESP32s3, NAU88C22, delay between SDA and SCL
Thank you, ESP_Sprite for brainstorming for me! [*]CSB/GPIO1 is NC [*]MODE is pulled down with a 10k resistor For further checks, I uploaded the schematics and a 3D rendering to get a first impression of the board. All project files are available here https://github.com/klaus-liebler/labathome. The ...
- Wed Aug 21, 2024 1:03 pm
- Forum: ESP-IDF
- Topic: IDF5.3 ESP32s3, NAU88C22, delay between SDA and SCL
- Replies: 10
- Views: 2772
Re: IDF5.3 ESP32s3, NAU88C22, delay between SDA and SCL
I changed the glitch_count to 0 and to 1, but this does neither affect the waveform nor the accessibility of NAU88C22. Hmm, well, yes: According to the spec, the behaviour of the ESP32s3 is perfectly fine. But this lag is the only visible difference between the (working) STM32 and the (non-working) ...
- Mon Aug 19, 2024 4:06 pm
- Forum: ESP-IDF
- Topic: IDF5.3 ESP32s3, NAU88C22, delay between SDA and SCL
- Replies: 10
- Views: 2772
IDF5.3 ESP32s3, NAU88C22, delay between SDA and SCL
Dear community, I am unable to communicate with the NAU88C22 audio codec using I2C on the ESP32s3 under IDF 5.3. Here is the setup: I have a custom-designed PCB with an I2C bus. The ESP32s3 is configured as the I2C master, and there are several I2C slaves on the bus, including an AHT20, an LSM6DS3, ...