Search found 4 matches

by fonsete
Sun Sep 22, 2024 8:21 pm
Forum: ESP-IDF
Topic: ESP32-C6 LP CORE
Replies: 5
Views: 45791

Re: ESP32-C6 LP CORE

That's probably why Espressif didn't took the time to implement it, but if you do it, I would be very interested in power consumption benchmark (and the code if you might publish it). Me too! I ended up using an S3 for a low-power project for which I would had preferred to use a C6 just because the...
by fonsete
Sun Aug 25, 2024 11:28 am
Forum: Hardware
Topic: ESP32 RTC clock instability with external XTAL or oscillator
Replies: 2
Views: 2268

Re: ESP32 RTC clock instability with external XTAL or oscillator

Did you manage to resolve it? I am experiencing a similar problem. See https://github.com/espressif/esp-idf/is ... 2308608268
by fonsete
Tue Jul 23, 2024 11:24 am
Forum: ESP-IDF
Topic: IDE support for ULP (RISCV) code
Replies: 1
Views: 623

Re: IDE support for ULP (RISCV) code

The problem seems to be that the ULP code is added by ExternalProject_Add and CLion doesn't support it yet:

https://youtrack.jetbrains.com/issue/CP ... ProjectAdd
by fonsete
Tue Jul 09, 2024 12:19 pm
Forum: ESP-IDF
Topic: IDE support for ULP (RISCV) code
Replies: 1
Views: 623

IDE support for ULP (RISCV) code

Hi, I am developing ULP code (RISCV) in particular and IDE support (CLion in my case) doesn't work. I get a "This file does not belong to any project target" error: Screenshot 2024-07-09 at 14.17.42.png How do you guys develop your ULP code? Do you simply give up symbol tracking and refactorings?