I have prepared and tested the following three tasks sketch that blinks three LEDs concurrently at different blink rates. Are there anything exaggerate particulalry on the definition of Tick Time and Time Slice (Fig-2)? Schematic: esp32-3led.png Figure-1 Task State Diagram: taskStateDiag.png Figure-...

If the cache is full, the least recently used block will be overwritten. (Note a block here would be one cache line which is 64 bytes.) Q1: By that cache, are you referring to I-Cache of the Core 0 which is 8 KB (Fig-1)? So, far I know that there is no cache memory outside the Core0/MPU0. Q2: In Fi...

It is 30-pin ESP32 Board and comes as ESP32 Dev Module in Boards List. At the back of the board, there is a laser engraving: ESP32S. The propsed UAR1(5, 18) communicates well with UART2(16, 17) of another ESP32S.

Thank you for the answer.

Q1: The Mask ROM of Fig-1 contains a Boot Loader with which the Arduino IDE's uploader is compatible. It is because Espressif has an agreement with arduino.cc Company? Q2: Assume that size of a sketch (application + FreeRTOS) is larger than the comined size of IRAM of Core0 + RAM of ESP32 but less ...

In the pinout diagram of my 30-pin ESP32 Dev Module, only UART2 Port is free. I need to use UART1 Port. Data sheet shows that the IO lines of this port are associated with physical pin-28/29 (GPIO9/10) of ESP32 MCU). Currently, PPin-28/29 of ESP32 MCU are engaged with flash memory. The following cod...

Thanks for the reply.

I have been experimenting with the following setup (Fig-1) and the sketch to understand the mechanism of FreeRTOS in allocating more time to Task11 (with higher priority level 2) than Tasks10 with priority level 1. Would appreciate you explain this mechanism. Sketch: TaskHandle_t Task10Handle; TaskH...

Thanks for the answer. In fact,

I wished to know if there is any internal cache inside the ESP32 (apart from external 4 MB flash memory and the memory block of the cores).

With reference to the attached diagram (Fig-1, given below), I would like to know, if there is any cache memory that Espressif has installed along with their Mask ROM, RAM, and RTC memory? If yes, how much its capacity and what kind of interface is used to access it (SPI, I2C, UART, ..)? ESP32Memory...

Source: 20/40mA

Does above mean --
20 mA continuous rating at 3.3V ?
40 mA means what?