Search found 7 matches
- Wed Jan 24, 2024 9:03 pm
- Forum: General Discussion
- Topic: Padding Bytes between Instructions in Disassembly
- Replies: 2
- Views: 1184
Padding Bytes between Instructions in Disassembly
Hi, I want to learn more on how compiled code is structured on binary level. Therefore, I wrote a simple program that calculates the factorial of a given number and prints it to the monitoring device. I modified the hello world project shipped with ESP-IDF to implement this. Afterwards, I decompiled...
- Wed Jul 19, 2023 7:04 pm
- Forum: Documentation
- Topic: App Image Format Documentation
- Replies: 4
- Views: 30368
Re: App Image Format Documentation
That description is terse, but accurate. What information specifically are you missing? (And note that aside from having segments, the format has very little to do with ELF and is not derived from it, it's a custom format.) For example, segment placement. There's a talk about "Extracting an ELF Fro...
- Tue Jul 18, 2023 7:42 pm
- Forum: Documentation
- Topic: App Image Format Documentation
- Replies: 4
- Views: 30368
App Image Format Documentation
Hi, I'm trying to analyse some ESP32 binaries, and could not find any documentation about the image format besides the explanation of the header fields in the ESP-IDF Programming Guide [1], not even the name of the format (it's a modified version of .elf). Or formats, as reading Esptool's code [2] s...
- Thu Jul 06, 2023 9:46 pm
- Forum: Sample Code
- Topic: ".byte 0x3f" instructions in disassembly
- Replies: 2
- Views: 31240
".byte 0x3f" instructions in disassembly
Hi, I'm using xtensa-esp32-elf-objdump[1] to analysis some ESP32-Binaries. I noticed that sometimes 0x3f single byte instructions(?) can be found in the disassembly. For example: 3f.png I could not find any mentioning of this in the Xtensa-ISA[2]. Why are they placed there? Regards [1] https://githu...
- Thu Jul 06, 2023 4:46 pm
- Forum: Hardware
- Topic: Instruction-fetch behaviour: undefined byte in 2-byte instructions
- Replies: 1
- Views: 1506
Instruction-fetch behaviour: undefined byte in 2-byte instructions
Hi, Chapter 3.5.4.1 Little-Endian Fetch Semantics of the Xtensa Instruction Set Architecture (ISA) Summary [1] provides some example code on its behaviour. One of the comments states: "-- now have a 24-bit instruction (8 bits undefined if 16-bit), break it into fields" If I replace the op-code of a ...
- Tue Jul 04, 2023 10:07 pm
- Forum: Documentation
- Topic: msbFirst Configuration Parameter
- Replies: 3
- Views: 46252
Re: msbFirst Configuration Parameter
Hi, thanks for the quick answer. GCC offers two flags to specify the endianness of the binary to build [1]: -mbig-endian and -mlittle-endian. Searching within the ESP-IDF with > grep -rnw ./esp-idf -e "-mbig-endian" (resp. "-mlittle-endian") did not provide any results. When compiling the Hello Worl...
- Thu Jun 29, 2023 7:55 pm
- Forum: Documentation
- Topic: msbFirst Configuration Parameter
- Replies: 3
- Views: 46252
msbFirst Configuration Parameter
Hi, Chapter 3.2 Processor-Configuration Parameters of the Xtensa Instruction Set Architecture (ISA) Summary [1] reads as follows: "Core Processor-Configuration Parameters lists the processor-configuration parameters that are required in the core architecture. Additional processor-configuration param...