Doing more testing I have observed that the behavior of the Core 0 is affected during the time the Core 1 is running with interruptions disabled. Tasks continue to run, but interrupt processing seems not working correctly. In particular no WIFI exchange takes place during that time. If the interrupt...

I read for few days the ESP manuals to try to understand how to implement the interrupt solution. But after reading them I still do not understand how when passing NULL to esp_intr_alloc it will be able to guess magically where is my interrupt routine (manuals are not really explicit about that!). B...

Thanks for your answer. I am trying to detect state changes on a collection of input ports, that may be as short as 1us and to date them at +/- 250ns relative precision. I have not been able to find a peripheral that could do that. I have thought to add a FPGA to do the precise part of the job but t...

Hi, I am using an ESP32 Xtensa dual core. I would like my main task running on core 1 (APP) having 100% of this core CPU. I have pinned all my other tasks on CPU 0. But I still lose 10us CPU time every 1ms (probably each tick). I have tried to configure FreeRTOS with #define CONFIG_FREERTOS_UNICORE ...