Does anyone have any clue?

Hi There, I have a project which uses high-level (level 5) GPIO interrupt and high-level timer interrupt. Previously it works very well with ESP-IDF V4.4. This week I updated the IDF to V5.0 release, after compiling and flashing, neither GPIO interrupt nor timer interrupt works anymore. Does anyone ...

To my understanding, "USB Serial/JTAG controller" is the on-chip JTAG via ESP USB D+ D- pin. PAD_JTAG is external JTAG which connects to ESP32 TMS, TDI, TDO...
set EFUSE_DIS_PAD_JTAG=1 will permanently disable external JTAG,
set EFUSE_DIS_USB_JTAG=1 will permanently disable on-chip JTAG via USB.

I see... Thank you Sprite!
I don't have any debugger for now, but I'll try it in the near future.

In ' esptool.py ' there is a function hard_reset(...) , attached below. With this hard_reset everything works well. Can I do the same hard reset internally on ESP32, or it has to be done externally? def hard_reset(self): print('Hard resetting via RTS pin...') self._setRTS(True) # EN->LOW time.sleep(...

Hi Everyone, In my project, I'm using ESP32-S3, IDF, and have 2 level-5 GPIO interrupts, 1 level-5 timer interrupt, as well as some uart, SPI, USB peripherals. It will have to restart after some parameter changes. Function esp_restart() is called to restart, but sometimes the program will be then st...

The method works as expected, but didn't resolve the problem. It does execute a various number of nop. The problem is jitter happens when it executes the series of nop instructions(less than 32), making the final time not accurate. The time error of the method is attached below. Every 1.33 seconds t...

Thank you Sprite, that's a brilliant idea! I'll try and let you know if it works

Best,
Wenpeng

I believe you are referring instruction loop, loopgtz or loopnez . They are zero-overhead loop instructions. I tried these 3 instructions this afternoon, but I can't get them working. One of the example code is attached below, I counted how many loops are executed, but it seems only executed 1 time....

In the high-priority interrupt I tried to delay the command by exact CPU cycles. But it seems the best accuracy of CPU delay I can get is 7 CPU cycles. I have some code that requires low interrupt jitter. Even with level-5 interrupt jitter still exists, and the jitter can be 23 CPU cycles caused by ...