I was able to implement AMP (Asymmetric Multi-Processing) and get core 1 to run my own bare metal applications. After installing the ISR service to run on core 1, I was able to reduce the interrupt jitter down to 1us.
My PR can be found here. https://github.com/espressif/esp-idf/pull/12800
Search found 9 matches
- Fri Dec 15, 2023 11:53 pm
- Forum: ESP-IDF
- Topic: external interrupt jitter
- Replies: 15
- Views: 68913
- Fri Sep 10, 2021 9:16 pm
- Forum: ESP-IDF
- Topic: external interrupt jitter
- Replies: 15
- Views: 68913
Re: external interrupt jitter
Any way to enable CONFIG_FREERTOS_UNICORE without it also forcing CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE? That way i can implement my own esp_startup_start_app_other_cores function.
- Fri Sep 10, 2021 1:59 am
- Forum: ESP-IDF
- Topic: external interrupt jitter
- Replies: 15
- Views: 68913
Re: external interrupt jitter
However, I changed it to default to Level 1 interrupt, but the issue still persists, so it is not necessarily a interrupt level issue. Note that level 1 is the level with the *least* priority. Higher levels = higher priority in Xtensa. I'm not surprised this doesn't do anything. Yes i know, i set a...
- Thu Sep 09, 2021 11:27 am
- Forum: ESP-IDF
- Topic: external interrupt jitter
- Replies: 15
- Views: 68913
Re: external interrupt jitter
I did some more digging into the IDF It looks like RTOS is setting up the interrupts without setting the level. Then in esp_intr_alloc_intrstatus, it is being defaulted to ESP_INTR_FLAG_LOWMED which could potentially assign it a level 3 interrupt. However, I changed it to default to Level 1 interrup...
- Thu Sep 09, 2021 6:26 am
- Forum: ESP-IDF
- Topic: external interrupt jitter
- Replies: 15
- Views: 68913
Re: external interrupt jitter
I created an example project with just the interrupt in it, and a blink task. getting between 2-9us so there is still interrupt jitter. Any idea what could be causing this?
https://github.com/FL0WL0W/ESP32InterruptExample
https://github.com/FL0WL0W/ESP32InterruptExample
- Wed Sep 08, 2021 9:36 am
- Forum: ESP-IDF
- Topic: external interrupt jitter
- Replies: 15
- Views: 68913
Re: external interrupt jitter
Hi ESP_Sprite, Yes you are correct, i have persistence set to infinite on the scope so i can capture all of the pulses to see the worst case. I've had it running on the bench all day and it looks like worst case is 48us latency, and best case is 2us which has been mentioned in some other posts. Here...
- Tue Sep 07, 2021 3:37 pm
- Forum: ESP-IDF
- Topic: external interrupt jitter
- Replies: 15
- Views: 68913
Re: external interrupt jitter
What we are getting at is called Ringing. It occurs when one signal tries to set the value high and another to set it low. Do you have that? Is the other processor setting it high and your code setting it low? It looks like it. No, You can see in the code that the input is on pin 35 (purple), and t...
- Mon Sep 06, 2021 8:53 pm
- Forum: ESP-IDF
- Topic: external interrupt jitter
- Replies: 15
- Views: 68913
Re: external interrupt jitter
The circuit is just another microcontroller generating a series of pulses. Pulse width of about 200us. The input is not heavily bouncing. I just have the scope triggering on both rising and falling edges. Here is another picture with the scope only triggering on the rising edge. Same problem. https:...
- Mon Sep 06, 2021 12:00 pm
- Forum: ESP-IDF
- Topic: external interrupt jitter
- Replies: 15
- Views: 68913
external interrupt jitter
Hi, I am having trouble with the external interrupt latency being very inconsistent. My code for testing the interrupt is as follows void app_main(void) { gpio_install_isr_service(ESP_INTR_FLAG_LEVEL3 | ESP_INTR_FLAG_IRAM); gpio_set_direction(static_cast<gpio_num_t>(35), GPIO_MODE_INPUT); gpio_set_i...