Also, ESP-IDF intergration is finally ongoing (in preview stage for IDF v5.3): https://github.com/espressif/esp-idf/issues/14021

Yeah, that does actually work fine, It's just aggravating that I can't get the plugin to work in native Eclipse any more. I don't know what I could have done to break it. I even deleted and recreated my ~/.eclipse and ~/.p2 directories. It's frustrating. Well at least that, but it is weird. Also, w...

Have you tried IDE package? Thats the Eclipse pre-packaged with plugin by Espressif. It seems to be working reasonably well for me. Well on Linux at least.

For the inactive code BLOCK highlight, I appreciate the effort, but yea, that really is not it. Could we just change the background color of whole inacive line(s) and leave everthing else the same?

Hi, I tried 3.0 too but reverted back to 2.12. No inactive code highlight (honestly a dealbreaker for me), previously working color customizations are not working anymore, theme switching not working either. I'll give Espressif some time to figure stuff out.

@eriksl original ESP32 does in fact have ethernet MAC with which you can achieve speeds up to around 75 Mbps. That is slight drawback of all newer chips that has to use SPI ethernet with max speeds barely over 10 Mbps. In some use cases the ethernet over USB might be interesting alternative tho.

So yeah, just to summarize: S3 on lower SPI frequencies seems to sample MISO data too late . Adjusting params like .input_delay_ns or .dummy_bits should help to solve this, but does not and in fact, does the opposite - only seems to make things worse. Using SPI_DEVICE_NO_DUMMY flag overrides the int...

I didn’t look into it in detail, but there are probably answers to the questions here. And I think this is intentional and conscious. https://github.com/espressif/esp-idf/blob/c8243465e45489835d645bf217a6929fd0c01b7f/components/hal/spi_hal.c#L133 iiinteresting... So the debug output print of spi_ha...

I see, so what I already did was to set both .command_bits and .address_bits to 0 as well as .spics_io_num to -1 and doing the write/read manually byte-by-byte, which allows me to have very safe delays between CS change as well as each byte transfer. This seems to have same effect as setting SPI_DEV...

I'm also having trouble setting correct timing with S3 and IDF v5.2-dev (only SPI Mode 2 seems correct) or IDFv4.4.6 (only SPI Mode 0 and 2 seems correct) while results on logic analyzer are correct for all modes. Something does not seem right.