Hi! Shown below is a code from C++ method, each statement with elapsed time. I feel it should run 10x times faster on ESP32-S2 . Given CPU clock as 4.2 ns per tick (240 MHz), simple sum takes ~60 ticks. I think it's unusually high. I searched for Xtensa docs but did not find reference numbers for ho...

Hi, There's a question (not a problem) about ESP32-S2 RMT demodulator . I have created a learning example for it, it works well, but I met with a difficulty to explain two parameters. Their values were found experimentally because I have no guess how they work. Parameters are located in RMT_CHn_RX_C...

Hi, Just my 5 cents: I looks like "config_idle_threshold" is measured in divided ticks. I found this during my low level tests with RMT registers I/O. I mean, take active clock (APB or REF), apply divider in use, and you will get a frequency ticks to use with this parameter.

Thank you for detailed reply! In general, I mostly share same thoughts. But all nuances matter. Nvidia makes great devices. The problem appears with their software. I really don't neeed tensor math over Python, proposed by mainstream manufactures. :) I use another math and so need just "bare metal" ...

Hi! You asked about use case. Here's it. I'm very interested in this topic because I develop some specific AI/AGI algorithms. From what looks prospective at the moment, an ESP32-S2 chip could work as a "cell" in super matrix computing. A PCB board could hold, say, 100 such chips. They're funny cheap...

I confirm the problem with light sleep for ESP32-S2 for very similar example. It looks like watchdog of timer group 1 has very short timeout, like 600 for first stage (interrupt) and 1200 for second (system reset). I tried to reset stage 0 timeout to default 26,000,000 but what suprized me, that aft...

Blocks of log text saying like this "RTC TIMER wakeup 0x00000008..." were reported by my Xtensa program.

Hi, I wrote low level code to put ESP32-S2 chip into hibernate mode and wake-up from there by RTC alarm timer. It works. My concern is that when RTC FAST memory is enabled to power down on sleep, system reports error when got waked up. See the error and log: E (46) boot: Fast booting is not successf...

Hi, this is just a status update, an information for curious minds. No need to reply. After further investigation of mentioned official example it was found that FSM program "ulp/wake_up.S" may fall in infinite cycle waiting for RTC module ready to accept wake-up's. Here's partial log for RTC_CNTL_L...

Thank you, ESP_Angus! Things got clear.