Hello All,
How is the behavior when there is a voltage drop in same time of NVS write process? Is there any protection mechanism which recognize that voltage drop and will stop this write process or would it be possible to get here some corrupted data?
Thank you.
Greetings
Search found 65 matches
- Thu Jul 22, 2021 6:38 am
- Forum: Hardware
- Topic: Voltage Drop in same time of NVS write process. Corrupted Data?
- Replies: 1
- Views: 2454
- Fri Jan 29, 2021 7:11 am
- Forum: ESP-IDF
- Topic: VDD_SDIO, RTC, cache, strap pins
- Replies: 4
- Views: 4586
Re: VDD_SDIO, RTC, cache, strap pins
Thank you very much :) 1. All right. I think so too about the cache implementation. I have to check this in detail in future. 2. Okay. Then I think I will open the case of the esp32 and will check the vendor of the flash 3. All right. 4. All right. I used the SDK, now I want check the ESP32 in detai...
- Thu Jan 28, 2021 7:17 pm
- Forum: ESP-IDF
- Topic: VDD_SDIO, RTC, cache, strap pins
- Replies: 4
- Views: 4586
Re: VDD_SDIO, RTC, cache, strap pins
Hello, Thank you. 1. Okay. So if bootloader is finished, then parts of the application code will be copied into IRAM? How can the MMU load the actual firmware although the MMU doesn't know which code will be executed next? 2. Thank you. In spi_flash_chip_generic.c there is the acutal chip listed: GD...
- Wed Jan 27, 2021 8:42 pm
- Forum: ESP-IDF
- Topic: VDD_SDIO, RTC, cache, strap pins
- Replies: 4
- Views: 4586
VDD_SDIO, RTC, cache, strap pins
Hello guys. I check the bootloader code of 2. stage bootloader and therefore I have some questions. Maybe some can answer these questions: 1. All of the code starting from the function "call_start_cpu0" is already in RAM via the help of MMU and cache? When will be the next instruction which loads mo...
- Tue Jan 26, 2021 6:19 pm
- Forum: ESP-IDF
- Topic: Questions in 2. stage bootloader code
- Replies: 14
- Views: 13485
Re: Questions in 2. stage bootloader code
Ah okay.
The differerence between the cache and the api helps me a lot
I will check the difference in detail
Greetings
The differerence between the cache and the api helps me a lot
I will check the difference in detail
Greetings
- Sun Jan 24, 2021 8:26 pm
- Forum: ESP-IDF
- Topic: Questions in 2. stage bootloader code
- Replies: 14
- Views: 13485
Re: Questions in 2. stage bootloader code
Hm Thank you but I still understand this...
Why I cannot acces them all? Because there is MMU needed? --> Then I have to check MMU / Cache first...
Thank you.
Why I cannot acces them all? Because there is MMU needed? --> Then I have to check MMU / Cache first...
Thank you.
- Sat Jan 23, 2021 1:22 pm
- Forum: ESP-IDF
- Topic: Questions in 2. stage bootloader code
- Replies: 14
- Views: 13485
Re: Questions in 2. stage bootloader code
I am sorry about that but I really don't understand this. - Could you please provide the chapter where I can find the information about the 11.5MB? (I think MMU, Cache, ...) - What is the TPM? ESP32 with 16MB Flash --> my thoughts are: Access all 16MB of the Flash, is this possible or are there limi...
- Thu Jan 21, 2021 5:47 pm
- Forum: ESP-IDF
- Topic: Questions in 2. stage bootloader code
- Replies: 14
- Views: 13485
Re: Questions in 2. stage bootloader code
Thank you. One more last question to really understand this topic:
"Instruction addressing has the size of 11512kB" means:
If I have an ESP32 with 16MB external flash I only can use maximum 11,512MB of them? The rest I can use for other things, for example for RAM.
Am I right?
Greetings
"Instruction addressing has the size of 11512kB" means:
If I have an ESP32 with 16MB external flash I only can use maximum 11,512MB of them? The rest I can use for other things, for example for RAM.
Am I right?
Greetings
- Wed Jan 20, 2021 6:51 pm
- Forum: ESP-IDF
- Topic: Questions in 2. stage bootloader code
- Replies: 14
- Views: 13485
Re: Questions in 2. stage bootloader code
Thank you very much. So 0x10000000, 0x60000000, 0x70000000, 0x90000000, 0xb0000000, 0xd0000000, 0xf0000000 will be used for internal things (wifi, ...) Am I right? At this matter I try to understand the external memory and read the documentation (chapter 2.3.3 External memory, page 30, https://www.e...
- Tue Jan 19, 2021 7:06 pm
- Forum: ESP-IDF
- Topic: Questions in 2. stage bootloader code
- Replies: 14
- Views: 13485
Re: Questions in 2. stage bootloader code
Thank you. That helped me a lot. I set the itlb / dtlb to "0x0" after that I am allowed to write / read in this pages... The question about the "detailed information" was: Why exactly these pages: 0x00000000, 0x80000000, ... I think there should some information in xtensa datasheet and I will search...