We actually have something in progress for BT interrupts internally. Should make it to the master branch shortly. From what I can see, it just saves all 64 registers plus WINDOWBASE and WINDOWSTART and switches to a new stack. Whatever state the registers are in will be saved that way. I'm interest...

I disabled the watchdog on core 1 with: # CONFIG_ESP_INT_WDT_CHECK_CPU1 is not set # CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1 is not set Then made an infinite loop in the highint5 interrupt. I would expect this to only affect task on Core1, but my task on Core 0 are not running anymore. (and CPU0 wa...

Hi Jacques, In this part: movi a14, 0x3FF4404C movi a15, (1<<26) l32i a15, a14, 0 did you mean s32i instead of l32i? Looks like you never write to the w1tc register, so the interrupt is not getting cleared. Thanks that was it :), I updated my repo for future reference: https://github.com/darthcloud...

Hi Jacques, In this part: movi a14, 0x3FF4404C movi a15, (1<<26) l32i a15, a14, 0 did you mean s32i instead of l32i? Looks like you never write to the w1tc register, so the interrupt is not getting cleared. Dohhh , shame on me :) It work now, thanks igrr. I think I need some sleep :)

Hi Guys, first post here :) I'm trying to get an example of GPIO interrupt with high-level interrupt to work but can't get it working properly. Look like my interrupt never get clear which make the interrupt trigger again in loop making the CPU1 wdt trigger. Disabling the wdt on CPU1 I can see my ta...