For the SPI bus in pico, it usually takes long time in CS high between commands.
Even in high clock, the CS high still dominate lots of time against CS low.
Is it possible to adjust the time for keeping CS high less than 1 us between commands?

We have a requirement with 4 SPI buses working simultaneously. And, all the MISOs should support DDR(double data rate).
Is this possible in ESP32?