Hello MicroController, I have finally resolved this issue by changing all FIFO write attempts to utilize the WRITE_PERI_REG macro. If this macro is not used, I am presuming something in the system cache operation must be performing look-ahead reads of the FIFO register, causing the change in rd_addr...

Hello Microcontroller, I have been monitoring the UART0 registers while single-stepping through the code, particularly the STATUS register (watching the "UART_RX_FIFO_CNT" parameter) and the MEM_RX_STATUS register (watching the "rd_addr" parameter). What I noticed was quite interesting... Each time ...

Hello Microcontroller, I have been examining the operation of the interrupt configuration in my simplified test project, and it appears that my code is properly configuring the interrupt matrix in such a way that my UART0 interrupt handler is the sole owner of the peripheral interrupt (not shared). ...

Hello MicroController, The bootloader should no longer be in the picture once it boots the application code. Yes, I was originally concerned about a conflict between print statements in supporting IDF code modules and my application code, but things have been working without issue until more recent ...

MicroController, Reading from an empty FIFO would obviously result in the read pointer getting corrupted. No, there is no chance that there were any changes in MY code where the FIFO would be getting read an extra time. Please keep in mind... the SAME code I have will work flawlessly on any ESP-IDF ...

Hello MicroController, I have managed to reduce the project to the initialization code, peripheral drivers and diagnostic support. This project still exhibits the problem described in my original post. Note that I am developing under VSCode with the PlatformIO extension (Core v6.1.11, Home v3.4.4). ...

BTW, The "code" is a rather large project... I will do my best to reduce things to the lowest common denominator and see if I can get a simple project that exhibits the same behavior. In the interim, below is a sample of what the current code is producing when built with v4.4.1 as I attempt to type ...

Hello MicroController... Thanks for the quick reply! I am enclosing the code for the ISR below... were you in need of anything else? FYI, the UART_PARAMS structure is something I have created for managing the connection - I've included that structure definition as well. Best Regards, Mark /*********...

Hello All, I have been developing with ESP-IDF v4.3.2. Under this version, I have UART communications working flawlessly over both UART0 and UART2. I recently attempted to upgrade the project to utilize the more recent releases of ESP-IDF. I discovered that the UART receive FIFO operation is no long...

Hello Michael, Let me clarify the hardware configuration and the history of my development effort... We have an existing product which contains a "host" microcontroller acting as the SPI bus master. This design has both a serial flash device and a different radio for IoT communications attached to t...